C语言 如何从一个 makefile 构建多个目标
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How to build multiple targets from one makefile
提问by Travis Griggs
I'm trying to parameterize my makefile targets. Currently, it has a
我正在尝试参数化我的 makefile 目标。目前，它有一个
TARGET = main
declaration near the top. It derives the SRClist from that as well as does lots of other things.
靠近顶部的声明。它从中得出SRC列表以及许多其他事情。
I've changed my C code though, so that I have multiple different top level .c files to basically get variant builds. So what I want to be able to do is basically do
不过，我已经更改了我的 C 代码，因此我有多个不同的顶级 .c 文件来基本上获得变体版本。所以我想要做的基本上就是做
make target1
or
或者
make target2
And vary what TARGETis set to in the makefile. I'm confused how to accomplish this. I thought I might add something like
并改变TARGET在 makefile 中设置的内容。我很困惑如何实现这一点。我想我可以添加类似的东西
target1: all
TARGET=target1
This didn't seem to work too well at all though. Is there a general pattern for how one does this?
但这似乎根本不起作用。有没有一种通用的模式来说明如何做到这一点？
回答by John Marshall
I would suggest simply spelling out your targets as separate targets in the makefile:
我建议简单地将您的目标拼写为 makefile 中的单独目标：
all: target1 target2
OTHER_OBJS = misca.o miscb.o miscc.o
target1: target1.o $(OTHER_OBJS)
target2: target2.o $(OTHER_OBJS)
Then make, make target1, make target2, and so on will all do what you want.
然后make，make target1，make target2，等等都将做你想做的。
You say your makefile "derives the SRClist from [$(TARGET)]" in some presumably high-tech way, but it might be interesting to try explicitly listing the object files in a low-tech way instead, as above. Using different maketargets is arguably Make's general pattern for producing different results.
您说您的 makefile以某种可能是高科技的方式“SRC从 [ $(TARGET)]派生列表”，但尝试以低技术方式显式列出目标文件可能会很有趣，如上所述。使用不同的make目标可以说是 Make 产生不同结果的一般模式。
回答by Eric Melski
Parameterized variable names and target-specific variables may do what you want, as the value of a target-specific variable is normally "inherited" by the prereqs of that target (assuming you are using GNU make):
参数化的变量名称和特定于目标的变量可能会做您想要的，因为特定于目标的变量的值通常由该目标的先决条件“继承”（假设您使用的是 GNU make）：
target1_SRC=123 456
target2_SRC=abc def
target1: TARGET=target1
target2: TARGET=target2
target1: all
target2: all
all: ; @echo $($(TARGET)_SRC)
Then you can run make target1or make target2, for example:
然后你可以运行make target1或make target2，例如：
$ make target1
123 456
$ make target2
abc def
