C语言 Verilog 中的 $display 和 C 中的 printf
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时间：2020-09-02 10:33:23 来源:igfitidea点击:
$display in Verilog and printf in C
提问by Tuyen Khuc
As you know in Veriloghas $display,$strobeand $monitor those used to display text on the screen.
And in C has printfto display text on screen also.
如您所知，Veriloghas$display,$strobe和 $monitor 用于在屏幕上显示文本。在 C 中也printf必须在屏幕上显示文本。
My question is how can I use one of them ($display,$strobe,$monitor) like printfin C?
我的问题是如何使用其中之一 ( $display,$strobe,$monitor) 像printfin C？
a: $display
b:$strobe
c:$monitor
d: all of them
e: other
回答by LuisEspinoza
$display("<format>", exp1, exp2, ...); // formatted write to display
format indication %b %B binary
%c %C character (low 8 bits)
%d %D decimal %0d for minimum width field
%e %E E format floating point %15.7E
%f %F F format floating point %9.7F
%g %G G general format floating point
%h %H hexadecimal
%l %L library binding information
%m %M hierarchical name, no expression
%o %O octal
%s %S string, 8 bits per character, 2′h00 does not print
%t %T simulation time, expression is $time
%u %U unformatted two value data 0 and 1
%v %V net signal strength
%z %Z unformatted four value data 0, 1, x, z
escape sequences, quoted characters in strings \n newline
\t tab
\ backslash
\" quote
\ddd octal
%% percent
any other characters between the quotes are displayed
the expressions are taken in order of the format indication
,, in the expression list inserts one space in the output
